Ranting on Altera’s OpenCL on FPGA again.

I'm currently working on porting my ray tracng OpenCL kernel to Altera's FPGA. Yes, I'm porting a OpenCL kernel. Its really frustrating working with Altera's OpenCL SDK. Altera's OpenCL compiler sucks. It took me less then 2 to implement all the host code and write a decent ray tracing kernel with BVH in OpenCL for my... Continue Reading →

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